Hardware and Software Co-design - Course Handout


BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK INTEGRATED LEARNING PROGRAMMES
Digital
Part A: Content Design
Course Title
Hardware and Software Co-design
Course No(s)
SS ZG626 / ES ZG626
Credit Units

Credit Model

Content Authors
Ashish Mishra

Course Objectives
No

CO1
To provide an understanding of system-level design of embedded systems comprised of both hardware and software
CO2
To investigate topics such as Hardware Software partitioning, mapping and scheduling, Co-simulation, synthesis and verification relevant to co-design
CO3
To explore, analysis and optimization processes in support of algorithmic and architectural design decisions; gain design experience with case studies using contemporary high-level methods and tools.

Text Book(s)
T1
Daniel D Gajski, Frank Vahid, Sanjay Narayan, Jie Gong, Specification and Design of Embedded Systems, Prentice Hall, 1994
T2
Jorgen Staunstrup, Wayne Wolf, Hardware / Software Co-Design: Principles and Practice, Kluwer Academic, 1997

Reference Book(s) & other resources
R1
G. DeMicheli, R. Ernst and W. Wolf, Readings in Hw/Sw Co-design, M. Kaufmann, 2002
R2
Ahmed A. Jerraya and Jean Mermet eds.: System Level Synthesis, Kluwer 1999.
R3
Hardware/Software Codesign. G. DeMicheli and M. Sami (eds.), NATO ASI Series E, Vol. 310, 1996
R4
Sanjaya Kumar, James H. Aylor, Barry W. Johnson, and Wm. A. Wulf. The Codesign of Embedded Systems. Kluwer, 1995
R5
Rajesh Gupta et.al. “Hardware-Software Cosynthesis for Digital Systems”, IEEE Design & Test of computers, Sept 1993.
R6
Asawaree Kalavade and Edward A. Lee. 1997. The Extended Partitioning Problem: Hardware/Software Mapping, Scheduling, and Implementation-bin Selection. Des. Autom. Embedded Syst. 2, 2 (March 1997), 125-163
R7
ACM Transactions, Proceedings of IEEE , IEEE Transactions



Content Structure
      1.            Introduction to Embedded System Design
      2.            Models of computation
                        2.1.            Models taxonomy
                        2.2.            State oriented and activity oriented models
                        2.3.            Structure and data oriented models
      3.            Architectural Models
      4.            Specification Languages
4.1 Introduction
4.2 SystemC
4.3 Specification Example: Telephone Answering Machine
      5.            Mapping
      6.            System partitionin
                        6.1.            Issues in system partitioning
                        6.2.            Functional partitioning   
                        6.3.            Extended partitioning for embedded application
                                          6.3.1.            Binary partitioning using GC-LP algorithm
                                          6.3.2.            Extended partitioning
                        6.4.            Exact method
                                          6.4.1.            Integer linear programming
                        6.5.            Heuristic methods
                                          6.5.1.            Constructive methods
                                                            6.5.1.1.            Random mapping
                                                            6.5.1.2.            Hierarchical mapping
                                          6.5.2.            Iterative methods
                                                            6.5.2.1.            Kernighan-Lin algorithm
                                                            6.5.2.2.            Simulated annealing
      7.            Multi-criteria optimization
                                                                        7.1.            Multi-objective optimization
      8.            Estimation
      9.            Recent trends and tools

Learning Outcomes:
No
Learning Outcomes
LO1
Understand the basics of Hardware Software Co-design
LO2
Learn and use the specification languages such as SystemC
LO3
Learn partitioning algorithms important for Hardware Software Co-design
LO4
Get exposure to tools and techniques of co-design
LO5
Gain experience in practical implementation of systems through co-design approach

Part B: Learning Plan
Academic Term
First Semester 2017-18
Course Title
Hardware Software Co-design
Course No
SS ZG626 / ES ZG626
Lead Instructor
Ashish Mishra

Contact Hour 1
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Introduction to Embedded System Design
T2
Post CH




Contact Hour 2
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Introduction to Embedded System Design
T2,T1
Post CH




Contact Hour 3
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Models taxonomy, State oriented and activity oriented models
T1
Post CH




Contact Hour 4
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Models taxonomy, State oriented and activity oriented models
T1
Post CH




Contact Hour 5
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Architeture models
T1
Post CH




Contact Hour 6
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Architecture model(contd..)
T1
Post CH




Contact Hour 7
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Specification Languages
Introduction
SystemC
Lecture Slides, T2, R1
Post CH



Contact Hour 8
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Specification Languages
Introduction
SystemC
Lecture Slides, Online contents for SystemC
Post CH



Contact Hour 9
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Specification Example: Telephone Answering Machine
Lecture Slides
Post CH



Contact Hour 10
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Specification Example: Telephone Answering Machine
Lecture Slides
Post CH




Contact Hour 11
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Mapping
Lecture Slides, T2
Post CH



Contact Hour 12
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Mapping
Lecture Slides, T2
Post CH



Contact Hour 13
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

System Partitioning,
Issues in System partitioning,
Functional partitioning,
Lecture Slides, R5
Post CH



Contact Hour 14
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

System Partitioning,
Issues in System partitioning, Functional partitioning,
Lecture Slides, R5
Post CH




Contact Hour 15
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Extended portioning for embedded application,
Binary partitioning using GC-LP algorithm
Lecture slides, R6
Post CH




Contact Hour 16
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Extended portioning for embedded application,
Binary partitioning using GC-LP algorithm
Lecture slides, R6
Post CH




Contact Hour 17
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Extended partitioning
Lecture slides, T6
Post CH







Contact Hour 18
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Integer Linear Programing
Lecture slides, T2
Post CH



Contact Hour 19
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Integer Linear Programing
Lecture slides, T2
Post CH



Contact Hour 20
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Random mapping, hierarchical
Lecture slides
Post CH



Contact Hour 21
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Random mapping, hierarchical
Lecture slides
Post CH




Contact Hour 22
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Random mapping, hierarchical
Lecture slides
Post CH



Contact Hour 23
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Kernighan-Lin algorithm
Lecture slides
Post CH



Contact Hour 24
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Kernighan-Lin algorithm
Lecture slides
Post CH



Contact Hour 25
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Simulated annealing
Lecture slides
Post CH




Contact Hour 26
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Multi-objective optimization
Lecture slides
Post CH



Contact Hour 27
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Multi-objective optimization
Lecture slides
Post CH



Contact Hour 28
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Multi-objective optimization
Lecture slides
Post CH



Contact Hour 29
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Estimation
Lecture slides
Post CH




Contact Hour 30
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Estimation
Lecture slides
Post CH




Contact Hour 31
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Recent trends and tools
Lecture slides
Post CH




Contact Hour 32
Type
Content Ref.
Topic Title
Study/HW Resource Reference
Pre CH



During CH

Recent trends and tools
Lecture slides
Post CH





Evaluation Scheme:  

Evaluation Scheme:  
Legend: EC = Evaluation Component; AN = After Noon Session; FN = Fore Noon Session
No
Name
Type
Duration
Weight
Day, Date, Session, Time
EC-1
Quiz-I
Online
-
5%
August 26 to September 4, 2017

Quiz-II
Online

5%
September 26 to October 4, 2017

Lab
Online

10%
October 20 to 30, 2017
EC-2
Mid-Semester Test
Closed Book
2 hours
30%
23/09/2017 (AN) 2 PM – 4 PM
EC-3
Comprehensive Exam
Open Book
3 hours
50%
04/11/2017 (AN) 2 PM – 5 PM


 Note: If Assignment kindly remove Quiz-I, II, III
Syllabus for Mid-Semester Test (Closed Book): Topics in Session Nos.  1 to 16
Syllabus for Comprehensive Exam (Open Book): All topics (Session Nos. 1 to 32)
Important links and information:
Elearn portal: https://elearn.bits-pilani.ac.in
Students are expected to visit the Elearn portal on a regular basis and stay up to date with the latest announcements and deadlines.
Contact sessions: Students should attend the online lectures as per the schedule provided on the Elearn portal.
Evaluation Guidelines:
1.       EC-1 consists of either two Assignments or three Quizzes. Students will attempt them through the course pages on the Elearn portal. Announcements will be made on the portal, in a timely manner.
2.       For Closed Book tests: No books or reference material of any kind will be permitted.
3.       For Open Book exams: Use of books and any printed / written reference material (filed or bound) is permitted. However, loose sheets of paper will not be allowed. Use of calculators is permitted in all exams. Laptops/Mobiles of any kind are not allowed. Exchange of any material is not allowed.
4.       If a student is unable to appear for the Regular Test/Exam due to genuine exigencies, the student should follow the procedure to apply for the Make-Up Test/Exam which will be made available on the Elearn portal. The Make-Up Test/Exam will be conducted only at selected exam centres on the dates to be announced later.
It shall be the responsibility of the individual student to be regular in maintaining the self study schedule as given in the course handout, attend the online lectures, and take all the prescribed evaluation components such as Assignment/Quiz, Mid-Semester Test and Comprehensive Exam according to the evaluation scheme provided in the handout.



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